Improvements in data processing systems have generally been directed at reduction either of the average time required to execute a given instruction or reduction in cost of the equipment required to perform such an instruction. One design tradeoff which has typically been made is that of cost versus speed for units of memory for the storage of data. For example, tape memory is traditionally slower and less expensive than disk memory. Disk memory in turn is available in several types; the selection of any one type involves a cost/speed tradeoff. Disk memory is slower but less expensive than solid-state memory which itself is available in several types, the selection of which again involves a cost/speed tradeoff. Thus, it continues to be a need of the art to provide cheaper, faster memories or, failing that, to improve the efficiency of presently existing memory types. The present invention relates to an improvement of the second type. In particular, the invention involves apparatus and methods of operation thereof for reducing the average time necessary for a host central processing unit (CPU), which typically comprises an arithmetic and logic unit and a main memory unit for retention of the instructions and data currently being operated on, to obtain data stored on a less expensive, long-term data storage device, such as a magnetic disk or tape drive unit.
Delays in memory access occur due to mechanical limitations on the apparatus. For example, in the case of a disk drive, in general, plural disks rotate at a fixed speed past read/write heads which may either be stationary with respect to the disk or move radially back and forth with respect to the disk in order to juxtapose the heads to various portions of the disk surfaces. In either case, there is a finite average time required for a particular data record to be located and read from the disk into a faster form of memory, typically a solid-state main memory included in the host computer. The delay may involve the "seek" time required for the head to be moved radially to the particular "track" selected, as well as "latency" time required for the disk to rotate with respect to the head until the beginning of the particular record sought is juxtaposed to the head for reading and writing.
Accordingly, it is an object of the invention of copending application Ser. No. 325,346 filed Nov. 27, 1981, of Dodd entitled "Cache Buffered Memory Subsystem", incorporated herein by reference and now U.S. Pat. No. 4,476,526 to provide a memory subsystem in which the average time required for a record sought to be transferred to the main memory system of a host computer is significantly reduced. The present invention relates to details of a preferred embodiment of that invention.
Prior art data processing systems typically comprise a host computer and long-term memory storage means including such devices as magnetic disk memory units and magnetic tape units. Communication from the host computer to the disk or tape memory subsystem is generally made via a "channel" which physically comprises a defined set of signal connections over which all information--including data as well as commands, control signals, status signals, request signals and the like--must pass. In order that a memory subsystem can be marketable, it must "interface" or mate directly with a channel identical with those with which prior memory subsystems mated, thus being "plug compatible" with the host computer.
It is an object of the present invention to provide an improved memory subsystem which is "plug-compatible" with a prior art host computer.
Similarly, it is desirable if not commercially requisite that any data subsystem not require modification to the host computer's programming instructions or "software" upon connection, i.e., that it be "software-transparent" to the host.
It is an object of the present invention to provide a memory system which provides improved performance as noted above, while being software-transparent to the host.
The copending application referred to above and incorporated by reference herein refers to a cache buffer memory supsystem comprising a solid-state cache memory and a cache memory controller. The solid-state cache memory contains data written thereinto in advance of a host's request for that data. Thereafter, when the host calls for that data it ca be supplied to the host immediately inasmuch as there is no seek or latency time required to access any portion of a solid-state memory array. In a preferred embodiment of that invention, described more fully in copending application Ser. No. 325,350 filed Nov. 27, 1981, of Dodd et al, entitled "Detection of Sequential Data Stream", and now U.S. Pat. No. 4,468,730, and a continuation-in-part of that application Ser. No. 441,901 filed Nov. 15, 1982, now U.S. Pat. No. 4,536,836, both incorporated herein by reference, the cache memory controller determines at what points it would be desirable to "stage" data not having been called for by the host into the cache memory array in anticipation of its being called for.
Those skilled in the art will recognize that disk memories of the type in most comxon use at the present time generally comprise a plurality of disks each having upper and lower surfaces for the storage of data by magnetization of areas on their surfaces. The disks are divided into concentric tracks which are divided into sectors. An index mark is provided on each disk identifying a first sector. When the host computer desires data from a disk drive it issues a "SET SECTOR" command whereby the disk drive is notified that data beginning with the sector identified by the host is to be read. According to a preferred embodiment of the present invention the data called for in each reading operation initiated by the host is examined to consider whether it is likely to be a part of a sequence of such records to be called for. If so, it is considered that the following record is likely to be called for, and the entire track from which the access request was satisfied is cached. If the remainder of the track is then called for by the host, it is available in cache memory and the host's request can be very quickly satisfied. Moreover, if the entire track is thereafter called for, the succeeding track is then "prestaged" to the cache in anticipation of further requests.
Those skilled in the art will recognize that numerous types of disk drives are available, each having differing amount of data stored per track. Accordingly, if the cache memory subsystem is to store data by tracks efficiently, it must be adapted to contain varying lengths of data efficiently. This is satisfied in accordance with copending application Ser. No. 325,351 filed Nov. 27, 1981, of Coulson et al, entitled "Adaptive Domain Partitioning of Cache Memory Space", and now U.S. Pat. No. 4,430,712, and a continuation-in-part of that application, Ser. No. 411,791 filed Nov. 15,1982, having the same title.
While, as noted above, it is deemed desirable to bring data into the cache from a disk memory system track by track, it is not necessarily the case that each request will begin at the index mark which may be taken to the start of each track. Instead, if the host has called for the first record in the track, the subsequent record will inevitably start other than at the beginning of the track. Clearly, it would be desirable to read succeeding records into the cache without waiting for the disk drive to complete the particular rotation during which the first data record was read. In order to do so, it is clearly essential that accurate orientation of the relative location of the track on disk and its storage location in the cache be maintained so that, for example, host requests for data stored on the remainder of the track can be satisfied by access to the corresponding data storage addresses in the cache.
It is an object of the present invention to provide such accurate orientation of disk memory with cache memory.
Those skilled in the art will recognize that records when stored on disk drives have "headers" or count fields preceding each record which include information identifying the particular record, specifying its length and the like. As is understood in the art, the requirements of headers for data stored in solid-state memories are substantially different from those of count fields on magnetic disk media, such as disk drives, and it would be accordingly desirable to provide means for transforming a number of magnetic media count fields into a single solid-state memory header.
It is an object of the invention to perform this transformation of the count fields into a single header and, in particular, to provide a header of a length variable in accordance with the number of records on each track and not of fixed length as is usual in the magnetic media prior art.
As noted above, it is desirable that an entire disk track be read from disk memory into cache memory at one time, but not necessarily starting from the beginning or index mark of the track. Accordingly, it is an object of the present invention to provide a means whereby it can be reliably determined that an entire track of data has been read from a disk drive into the cache memory array.
Occasionally, it is necessary to convert a channel program that was operating on a track image in cache memory (a frame) to operating on the actual track on the disk; that is, it becomes necessary to read a portion of a track from the disk, rather than the cache, or to write to a track which has been cached. In each case, it is necessary to recreate the specific record and field orientation that existed in cache before continuing the channel program with records from the disk track.
The need for returning a channel program to disk arises in the following situations: (1) an error prevents data from being accessed in cache memory; (2) a write command is received in the channel program and it is deemed undesirable to write to cache memory; or (3) a sequential track required during multi-track processing is not located in cache memory.
It is an object of the present invention to perform an accurate reorientation from the records stored in cache memory to the same records stored on the disk track. Further, it is an object of this invention to perform this reorientation operation within a single revolution of the disk, without necessarily waiting for the index mark on the disk track to provide reorientation.
In the prior art, this was not always possible. Examples of related prior art systems include the Storage Technology Corporation 4000/4305 "solid-state disk" system, in which a solid-state memory effectively minimized a magnetic disk system and the Storage Technology Corporation 8880/8650 disk subsystem.
The 4000/4305 solid-state disk subsystem used a track remaining count which is similar to the emulated track position (ETP) of this invention. However, this track remaining count was not used for transferring orientation from a frame to a disk track; no magnetic disk memory was included in that system.
The 8880/8650 disk subsystem uses a reorient counter that counts an approximate full track revolution starting from the beginning of a record. If the 8880 director encounters errors reading a record, then the reorient counter in the device informs the director when the same record is about to pass under the read/write head again. This technique allows positive reorientation on a specific record on disk, but requires that orientation had been previously established on the disk.